The design of digital hearing aids involves numerous trade-offs between processing capability, flexibility, power consumption and size. Minimizing both chip size and power consumption are important design considerations for integrated circuits used in hearing aids. Fully-programmable implementations of digital hearing aids (i.e., those that use a software-controlled digital signal processor) provide the most flexibility. However, with current technology, a fully-programmable digital signal processor (DSP) chip or core consumes a relatively large amount of power. An application specific processor (typically implemented using an application specific integrated circuit or ASIC) will consume less power and chip-area than a fully-programmable, general-purpose DSP core for equivalent processing capabilities, but is less flexible and adaptable.
Digital hearing aids typically operate at very low supply voltages (1 volt). If circuits for digital hearing aids are fabricated using conventional high-threshold (0.6 volt or greater) semiconductor technology they are not able to operate at high clock speeds (&gt;1 MHz) because of the small difference between the supply voltage and threshold voltage. Even if a DSP core is capable of executing one instruction per clock cycle this limits the computation speed to less than 1 million instructions per second (1 MIPS). This is not a high enough computation rate to implement advanced processing schemes like adaptive noise reduction or multi-band wide dynamic range compression with 16 or more bands. Because ASIC implementations overcome the sequential nature of a typical DSP core and permit calculations to be made in parallel, they can provide more computational capability, i.e. a higher computation rate, and can be used to implement computationally intensive processing strategies.
A major disadvantage of digital hearing aids that are implemented using ASICs is that they are "hardwired" and lack the flexibility required for refinements in processing schemes that will take place over time as knowledge of hearing loss increases. In contrast, digital hearing aids that use programmable DSP cores can be re-programmed to implement a wide range of different processing strategies.
The basic processing strategy used by the vast majority of hearing aids applies frequency specific gain to compensate for hearing loss. Adaptive processing schemes like compression and noise reduction extend this basic processing scheme by adjusting the frequency specific gain in response to changes in input signal conditions.